1. Field of the Invention
The present invention relates to power-on reset and voltage supply monitoring integrated circuits.
2. Description of the Related Art
Virtually every digital and mixed-signal (digital/analog) electronic and electrical system faces the problem of the initial indetermination of its state, when the power is ramped from zero volts to its nominal value. A common solution that has spurred a plethora of prior art is the adoption of a so-called power-on reset (P.O.R.) circuit, that can monitor the level of one or more supply lines, and issue a digital “reset” signal to initialize the digital circuitry and in particular any finite state machines (FSMs) present inside the system. Solutions have been devised that rely on the simplest voltage divider and Schmitt trigger approach, cited as prior art by e.g. Yukawa (U.S. Pat. No. 5,136,181); often complemented by a more complicated but digital-like, supply-referred CMOS solution such as found in Yukawa, or Ikezaki (U.S. Pat. No. 6,144,237). Other approaches recognize the limitations of a CMOS-only implementation, susceptible to V-threshold shifts and referred to the power rail; and those less temperature-stable while more process-dependent. Those solutions adopt self-compensating circuits such as variants of the bandgap reference block, where the temperature dependence of a p-n junction's ΔV (ΔVBE for the bipolar transistor case, or simple ΔVD for the diode case) which is approximately −2 mV/° C. due to inherent physical properties of silicon, gets compensated by an Ohmic drop I·R of a PTAT (Proportional To Absolute Temperature) current flowing into a resistor featuring minimal, or often even advantageous, sheet resistivity p dependence on temperature. Being based on inherent semiconductor properties, this approach also is less susceptible to process shifts, which—in case they affect the resistors, for example, in the ΔVD+R·I=Vconstant mesh voltage balance outlined above—can easily be trimmed by laser, fuses, E2PROM-based techniques at the inception of the circuit's product life in the factory. Such general approach to define a suitable and most invariant reference voltage against which the power supply can be compared has been either modified or cited as prior art by e.g. Zhou (U.S. Pat. No. 6,847,240) and Morigami (U.S. Pat. No. 5,070,295, using diode/resistor combinations); or also by Tang et al. (US Patent Publication No. 2009/0102522), Chung (U.S. Pat. No. 5,959,477), and Hou (US Patent Publication No. 2008/0079467), which use a more classic configuration of the bipolar-based bandgap cell. One advantage of such idea is the fact that a bandgap-reference integrated circuit is very commonplace in a number of precision circuits, such as A-to-D and D-to-A data converters where the analog signal has respectively to be weighted, and synthesized, with respect to a stable, accurate, and precise voltage reference (see e.g. cited Zanchi patents regarding voltage reference systems); or data acquisition front-ends equipped with a variable-gain amplifier (VGA) where the relative strength of the input signal is object of comparison against a full-scale level to be maintained constant.
The purpose of the POR circuit is to signal when the lower supply rail has reached a suitable operational voltage, that allows the digital logic to work reliably as expected. With the exception of Ikezaki, where the POR output is not issued for Vsupply close to 0, all the other prior arts known to the inventor are either issuing a POR signal when the Vsupply is less than a certain threshold; or issuing a finite time-pulse when the POR circuit determines a threshold of “acceptable voltage” has been exceeded. When the implementation itself is not conducive to such voltage characteristic, such as in Hou and as outlined by Zhou with regards to previous prior art, such anomaly is removed by means of additional “gating” circuitry (Hou) or by modifying the electrical configuration of the circuit (Zhou).
What is desired is a simple POR circuit and method of operation that can provide indications of undervoltage, overvoltage, and normal operating conditions that is suitable for use on integrated circuits.